Wednesday, November 25, 2020

Design of a K-Band MMIC PA for Satcom Applications

Parent Category: 2020 HFE

By David Vye and Thomas Young

K/Ka-band (26.5-40 GHz) satellite communications (satcom) systems are popular for global broadband services, offering universal access to faster data rates due to the higher bandwidths available in this frequency spectrum. These systems are enabled through high-power amplifiers (HPAs) in next-generation, satellite-based, RF front-end components. Originally part of the European Space Agency (ESA) Advanced Research in Telecommunications Systems (ARTES) program, Arralis Ltd. in Limerick, Ireland, has developed the Leonis chipset to meet the growing demand for lower cost K/Ka-band satellite communications (satcom) equipment.

This article describes the design of the Leonis chipset using the Cadence® AWR Design Environment® platform. The chipset includes in-phase quadrature (I/Q) and subharmonic mixers, upconverter and downconverter core chips, switches, phase shifters, low-noise amplifiers (LNAs), and PAs. Within this chipset is the company’s LE-Ka1330308, a high-power monolithic microwave integrated circuit (MMIC) amplifier. Arralis has successfully demonstrated transceiver architectures for both uplink and downlink communications.

The MMIC HPA Design

The transmitter gain versus output power for the LE-Ka1330308, configured in a typical low-band transmitter architecture, is shown in Figure 1. This integrated HPA operates from 17.5-20 GHz and typically delivers 10 W saturated output power, with a power added efficiency (PAE) of 25% and large-signal gain of 20 dB in a compact die size of 3.7 x 3.0 mm.
The three-stage MMIC amplifier was fabricated on the United Monolithic Semiconductors (UMS) GH25-10 process. The 0.25 μm, gallium nitride (GaN) on silicon carbide (SiC) technology is space qualified and International Traffic in Arms Regulations (ITAR)-free. It is matched to 50 Ω with integrated DC blocking capacitors on RF ports and incorporates an output power detector to assist with system integration.

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Figure 1: Chipset architecture for K/Ka-band satcom applications.

Arralis designers used simulation software to ensure the design met its performance targets based on active and passive MMIC component models developed by the foundry and organized into process design kits (PDKs) developed through collaboration between the AWR® and UMS modeling teams. Circuit design and simulation was performed using AWR Microwave Office® circuit design software. The AWR AXIEM® planar electromagnetic (EM) simulator was used to model the MMIC manifold feed network, on-chip passives, and evaluation board, and the AWR Analyst™ 3D finite element method (FEM) EM simulator was used for the analysis of the package.

The characterization and modeling methods implemented by the UMS foundry have been validated through a well-established process/model qualification procedure, developed over years, that has been proven to yield reliable device models for the foundry’s family of semiconductor processes. The extracted nonlinear models account for trapping phenomena and transistor self-heating. In addition to electrical characterization, the UMS modeling team performed a comprehensive study of the thermal device behavior and other non-stationary effects to improve the quality of its nonlinear device modeling.

The MMIC die was analyzed using these foundry-verified, schematic-based models and EM analysis, allowing the designers to reliably predict and optimize key performance metrics. Figure 2 shows the correlation between measured and modeled S-parameters. The graph also shows the simulated gain variation due to process tolerances. Measured gain performance falls on the high side of the variation, however it is within the predicted limits of the simulation.

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Figure 2: Simulated data including yield analysis vs. modeled small- signal frequency response for the LE-Ka1330308 reference board shown in Figure 3.

EM analysis and design optimization were carried out at the component and subcircuit level to ensure that parasitics and inadvertent EM coupling between structures was incorporated into the simulation. Towards the end of the design phase, the AXIEM simulator was used for EM analysis of the entire MMIC for final verification and RF signoff, ensuring that all interactions were captured in simulation.

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Figure 3: LE-Ka1330308 reference board.

Packaged Device Development
Following the success of the bare die MMIC, the Analyst EM simulator was used to model the package shown in Figure 4, and to minimize return loss due to impedance mismatches between the MMIC, the package, and the evaluation board. The simulation results showed a well-matched transition with insertion loss of 0.25 dB. This translated to an overall gain reduction of 0.5 dB and power reduction of 0.25 dB for the packaged part compared to bare die option.

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Figure 4: Package model input/output (I/O) port simulation setup (left) and resulting mesh (right) in Analyst software.

This article has described the successful design of a K/Ka-band chipset and 10 W saturated output power HPA for satellite communications applications. The three-stage MMIC amplifier, fabricated with space-qualified, 0.25 μm GaN on SiC, was developed using state-of-the-art semiconductor technology, foundry-qualified device models, and AWR software circuit and EM simulation technology. Transceiver architectures for both uplink and downlink communications were demonstrated with this chipset and the integrated HPA.

About the Authors
David Vye is senior product marketing manager for the AWR portfolio at Cadence Design Systems. He formerly served as an editor for a microwave publication and has held a number of technical and marketing positions at ANSYS, Ansoft Corp., Raytheon, and M/A-COM. David holds a BS from the University of Massachusetts.

Thomas Young is senior MMIC design engineer at Arralis Ltd. Previously he has worked for TDK Electronics as a design engineer, and MACOM in Belfast as a senior design engineer, and Queens University as a research assistant. Thomas holds an MEng from Queen’s University in Belfast.

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